Article 1732 of rec.games.corewar: Newsgroups: rec.games.corewar Path: hellgate.utah.edu!cs.utexas.edu!wupost!uunet!vuse.vanderbilt.edu!stst From: stst@vuse.vanderbilt.edu (Stefan Strack) Subject: System validation Message-ID: Sender: news@vuse.vanderbilt.edu Nntp-Posting-Host: necs Organization: Vanderbilt University School of Engineering, Nashville, TN, USA Date: Sat, 10 Apr 1993 07:36:35 GMT Lines: 129 The program below can be used to determine whether your corewar interpreter complies with ICWS88 and evaluates operands "in-register" (i.e. is compatible with KotH). It is based on Mark Durham's "Validation Suite" collection of code sniplets and adds some timing and core initialization tests. Results for the interpreters in soda's system directory that I could test: c88v320 - passes mars88 - passes mercury - passes KotH v3.1 - passes kothpc - fails (initializes with DAT #0,#0, mixed evaluation modes) corwp302 - fls (initializes with DAT #0,#0) Speaking of which, would somebody volunteer to put together a comparative review of interpreters for one or more of the platforms (PC,Mac,Amiga,UNIX)? This would become part of the FAQ or a separate regular posting. Contact me for details. (You should not be a system author for obvious reasons :-) Regards, Stefan (stst@vuse.vanderbilt.edu) ;redcode ;name Validate 1.0R ;author Stefan Strack ;strategy System validation program - based on Mark Durham's validation suite ; ; This program tests your corewar system for compliance with the ICWS88- ; standard and compatibility with KotH. It self-ties (i.e. loops forever) ; if the running system is ICWS88-compliant and uses in-register evaluation; ; suicides (terminates) if the interpreter is not ICWS compliant and/or uses ; in-memory evaluation. A counter at label 'flag' can be used to determine ; where the exception occured. ; ; Tests: ; -all opcodes and addressing modes ; -ICWS88-style ADD/SUB ; -ICWS88-style SPL ; -correct timing ; -in-memory vs. in-register evaluation ; -core initialization start spl l1 count djn count,#37 ;time cycles t1 dat #0,#1 t2 dat #0,#3 l1 spl l2 dat